Jun 262018

Página del autor

Zoltan F. Baruch

This book covers part of the overall design and internal details of computer systems. Its primary objective is to provide a foundation for understanding and evaluating the design principles of computer systems at undergraduate level. Structure of Computer Systems is designed to be used as a textbook for students in computer science. The ideal prerequisites for this book would be an undergraduate course in digital logic design and an introductory course in computer architecture, covering number representation, central processing unit, and instruction set architecture.

The book is divided into six chapters. The first part of the introductory chapter provides a taxonomy and an overview for a wide range of computer architectures. The second part of this chapter introduces the basic concepts used in measuring the performance and quality of these architectures. It describes the main performance metrics and benchmark programs used to evaluate computer performance. At the end of this chapter, two important quantitative principles of computer design are presented, Amdahl’s law and locality of reference.

Chapter 2 describes the methods used for design representation and introduces the steps of the design process from a computer designer’s perspective. It presents the different views and levels of abstraction used to represent a computer or electronic system. The rest of this chapter is an introduction to the VHDL language, one of the most important hardware description languages. This part does not present the syntax of the VHDL language statements, but only the conceptual aspects of this language, such as styles of description, time model, and simulation of a model.

Chapter 3 covers the principles of arithmetic-logic unit design. It examines some of the basic and more advanced techniques used to implement in hardware the basic arithmetic operations for integer numbers. This chapter describes the following types of adders: ripple carry adder, carry lookahead adder, carry select adder, serial adder, and binary-coded decimal adder. Next, several multiplication techniques are presented, including shift-and-add multiplication, Booth’s technique, Wallace-tree multiplication, and array multiplication. The two basic division techniques of restoring division and nonrestoring division are introduced, and the more advanced techniques of SRT division and array division are described. The chapter also presents the principle of floating-point representation, an overview of the IEEE 754 floating-point standard, and the basic operations with floating-point numbers.

Chapter 4 discusses the memory subsystem of a computer. First, it introduces the memory hierarchy and describes the various memory types. The emphasis is on semiconductor main memory, for which the memory cell, memory organization, and memory design are presented. The DRAM memory is described in more details, including performance parameters and a coverage of various DRAM technologies that have been developed, including Synchronous DRAM (SDRAM), Enhanced SDRAM (ESDRAM), Virtual Channel Memory (VCM), Fast Cycle RAM (FCRAM), and Double Data Rate (DDR) SDRAM. Several generations of the DDR SDRAM memory are introduced, with the emphasis on the latest generations, DDR3 SDRAM and DDR4 SDRAM. Next, this chapter describes the interleaved memory, associative (or content-addressable) memory, cache memory principles and design, and virtual memory.

Chapter 5 details the design of instruction and arithmetic pipelines. It introduces the principle of pipelining, the pipeline structure, performance measures, and pipeline types. The part dedicated to the instruction pipelines focuses on the problems that have to be solved for these pipelines: fetching problem, bottleneck problem, structural hazard problem, data hazard problem, and control hazard problem. The next part of this chapter discusses several throughput improvement methods for an instruction pipeline, including superscalar and superpipeline processing, very long instruction word (VLIW), and explicitly parallel instruction computing (EPIC). The part dedicated to arithmetic pipelines describes principles for designing arithmetic pipelines, examples of pipelined multipliers, and introduces systolic arrays, which are conceptually related to arithmetic pipelines.

Finally, Chapter 6 discusses the principles of RISC architectures, the properties of RISC architectures versus CISC architectures, the advantages of RISC architectures, and applications of RISC processors. This chapter also includes a case study for the ARM® (Advanced RISC Machine) architecture, which is widely used in the processors of mobile devices, consumer electronics devices, and embedded systems. This part describes the evolution of the ARM architecture by presenting the ARM architecture versions and the most important architectural extensions and technologies introduced by these versions. Examples include the Advanced SIMD extension, the ARM® TrustZone® security extension, the ARM® MPCoreTM technology, the virtualization extensions, the ARM® big.LITTLETM technology, and the ARM® CoreSightTM debug and trace technology. A processor that is presented in more details is the ARM® Cortex®-A72 processor, which implements the latest ARM architecture, ARMv8.

Editorial Niram Art - Madrid